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ACSP: ANALOG IC RELIABILITY IN NANOMETER CMOS

Engineering

Mathematics & Science

Gt Product Group

Binding Format

Marketing Imprint Name

B2B GT

CL Carton Count

Imprint Name

B2B & B2C

This book focuses on modeling, simulation and analysis of analog circuit aging. First, all important nanometer CMOS physical effects resulting in circuit unreliability are reviewed. Then, transistor aging compact models for circuit simulation are discussed and several methods for efficient circuit reliability simulation are explained and compared. Ultimately, the impact of transistor aging on analog circuits is studied. Aging-resilient and aging-immune circuits are identified and the impact of technology scaling is discussed. The models and simulation techniques described in the book are intended as an aid for device engineers, circuit designers and the EDA community to understand and to mitigate the impact of aging effects on nanometer CMOS ICs.

Analog IC Reliability in Nanometer CMOS

POST SECONDARY FOUR YEAR

COLFR

COLSO

COLJR

COLSR

Duration

Duration Unit Of Measure

Transaction Type

Front Cover.
Other Frontmatter.
Title Page.
Copyright Page.
Abstract.
Contents.
Abbreviations.
Symbols and Quantities.
1: Introduction.
2: CMOS Reliability Overview.
3: Transistor Aging Compact Modeling.
4: Background on IC Reliability Simulation.
5: Analog IC Reliability Simulation.
6: Integrated Circuit Reliability.
7: Conclusions.
Bibliography.
Index.

Analog IC Reliability in Nanometer CMOS.css-1p8rvzy{position:absolute;padding-left:8px;}

Analog IC Reliability in Nanometer CMOS