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Exploring Memory Hierarchy Design with Emerging Memory Technologies

LNEE: EXPLRNG MMRY HIERARCHY DSGN W/EMERGNG MEMORY TECH

Engineering

Mathematics & Science

Gt Product Group

Binding Format

Marketing Imprint Name

B2B GT

CL Carton Count

Imprint Name

B2B & B2C

This book equips readers with tools for computer architecture of high performance, low power, and high reliability memory hierarchy in computer systems based on emerging memory technologies, such as STTRAM, PCM, FBDRAM, etc.  The techniques described offer advantages of high density, near-zero static power, and immunity to soft errors, which have the potential of overcoming the "memory wall."  The authors discuss memory design from various perspectives: emerging memory technologies are employed in the memory hierarchy with novel architecture modification;  hybrid memory structure is introduced to leverage advantages from multiple memory technologies; an analytical model named "Moguls" is introduced to explore quantitatively the optimization design of a memory hierarchy; finally, the vulnerability of the CMPs to radiation-based soft errors is improved by replacing different levels of on-chip memory with STT-RAMs.

POST SECONDARY FOUR YEAR

COLFR

COLJR

COLSO

COLSR

Duration

Duration Unit Of Measure

Transaction Type

Front Cover.
Half Title Page.
Title Page.
Copyright Page.
Contents.
1: Introduction.
2: Replacing Different Levels of the Memory Hierarchy with NVMs.
3: Moguls: A Model to Explore the Memory Hierarchy for Throughput Computing.
4: Exploring the Vulnerability of CMPs to Soft Errors with 3D Stacked Non-Volatile Memory.
5: Conclusions.
Index.

Exploring Memory Hierarchy Design with Emerging Memory Technologies.css-1p8rvzy{position:absolute;padding-left:8px;}

Exploring Memory Hierarchy Design with Emerging Memory Technologies